1. Field of the Invention
The present invention relates to the structure of a gate electrode of a semiconductor device such as a field-effect transistor (FET) having a MOS (metal-oxide-semiconductor) structure.
2. Description of the Background Art
Refinement of a field-effect transistor (hereinafter referred to as "MOSFET") having a MOS structure progresses in recent years. This results in such a problem that thin wire resistance or contact resistance of a gate electrode is increased as the gate length of the gate electrode is reduced, for example. When the thin wire resistance or the contact resistance is increased, the circuit operating speed is disadvantageously slowed down while the number of memory cells capable of sharing a single word line is reduced, the number of divided word lines is increased and the number of peripheral circuits is also increased, leading to an increase of the chip area in a memory such as a DRAM (dynamic random-access memory). When the chip area is increased, the theoretical chip number per wafer is reduced to increase the production cost and reduce the price competitiveness of the chip. Therefore, reduction of the thin wire resistance or the contact resistance, leading to implementation of refinement of the semiconductor device and reduction of the chip area, are important development items in the semiconductor industry.
A gate electrode of a conventional MOSFET is formed by a single-layer electrode consisting of only polysilicon containing an impurity element added in high concentration or a multilayer electrode of a metal silicide/polysilicon structure having relatively small gate resistance, represented by a WSi.sub.x (x=2.4 to 2.8)/polysilicon structure or a CoSi.sub.2 /polysilicon structure. However, it is difficult to apply the conventional gate electrode having such a structure to a transistor having a fine pattern of not more than 0.12 .mu.m, for example. This is because the thin wire resistance or the contact resistance of the gate electrode is excessively increased when the gate electrode is refined.
Therefore, a polymetal gate electrode having lower resistance than the conventional gate electrode is watched with interest. For example, Japanese Patent Application Laid-Open No. 11-233451 (1999) discloses a general polymetal gate electrode.
FIG. 21 is a model diagram showing a sectional structure of a conventional polymetal gate electrode 106. The gate electrode 106 is formed by successively depositing a polysilicon film 102, a barrier metal film 103, a metal film 104 and an insulator film 105 on the main surface of a silicon substrate 100 through a gate insulator film 101. The barrier metal film 103 consists of tungsten nitride (WN) or titanium nitride (TiN), and the metal film 104 consists of tungsten or the like. The polysilicon film 102 is doped with an impurity element in high concentration. This impurity element is prepared from an n-type dopant such as phosphorus or arsenic when forming an NMOSFET (n-channel MOSFET) or from a p-type dopant such as boron or indium when forming a PMOSFET (p-channel MOSFET). A polymetal gate electrode structure stands for such a three-layer structure of a metal film, a barrier metal film and a polysilicon film. When no barrier metal film 103 is interposed between the polysilicon film 102 and the metal film 104, polysilicon thermally diffusing from the polysilicon film 102 reacts with metal atoms contained in the metal film 104 to form metal silicide and disadvantageously increase the resistance of the gate electrode 106 when the gate electrode 106 is heat-treated after deposition.
FIGS. 22 and 23 illustrate concentration distribution of various types of elements contained in the polysilicon film 102, the barrier metal film 103 and the metal film 104 when the metal film 104 consists of W and the barrier metal film 103 consists of WN.sub.x as first prior art of such a polymetal gate electrode. Referring to FIGS. 22 and 23 illustrating the concentration distribution along the line A1-A2 in FIG. 21, FIG. 22 shows the concentration distribution immediately after depositing the barrier metal film 103 and the metal film 104, and FIG. 23 shows the concentration distribution after heat-treating the gate electrode 106 in a later step. Referring to each of FIGS. 22 and 23, the horizontal axis shows the distance, and the vertical axis shows the logarithmic scale values of atom numbers per unit cubic centimeter. As the heat treatment, RTA (rapid thermal annealing) is carried out at 1000.degree. C.
Referring to FIG. 22, nitrogen atoms (N) and tungsten atoms (W) are substantially homogeneously distributed in the barrier metal film 103 before the heat treatment. After the heat treatment, on the other hand, tungsten nitride (WN.sub.x) contained in the barrier metal film 103 decomposes into tungsten atoms (W) and nitrogen atoms (N) due to the RTA, and the nitrogen atoms partially evaporate as nitrogen molecules, partially segregate toward the metal film 104 and partially form W.sub.2 N, which is a conductor having lower resistance than WN.sub.x. It is understood from FIG. 23 that the concentration distribution of silicon atoms (Si) shifts into the barrier metal film 103 due to the heat treatment and the silicon atoms diffuse into the barrier metal film 103 from the polysilicon film 102. Hence, it is conceivable that such diffusing Si reacts with W and N in the barrier metal film 103 to form an insulator such as silicon nitride (SiN) or WSiN and tungsten silicide (WSi.sub.x) having higher resistance than a high melting point metal such as W or Mo. Thus, there is a possibility that the resistance (sheet resistance and contact resistance) of the barrier metal film 103 is increased.
An example employing W for the metal film 104 and two layers of TiN and Ti for the barrier metal film 103 is also proposed as second prior art of the polymetal gate electrode. In conventional manufacturing steps, the polysilicon film 102, the barrier metal film 103 and the metal film 104 are generally deposited on the overall surface of the silicon substrate 100 through the gate insulator film 101 and thereafter the insulator film 105 of silicon nitride or silicon oxynitride is deposited and the gate electrode 106 is formed by anisotropic etching employing photolithography.
Further, high-temperature heat treatment is performed on the gate electrode 106 in a diluted oxygen atmosphere for forming oxide films on the side walls thereof, in order to recover the gate electrode 106 from damages resulting from the aforementioned anisotropic etching. In this high-temperature heat treatment, titanium and polysilicon react with each other in the barrier metal film 103 to form metal silicide (TiSi.sub.x). This metal silicide diffuses into the polysilicon film 102 and reaches the gate insulator film 101 during the aforementioned high-temperature heat treatment to remarkably deteriorate the insulation property of the gate insulator film 102 or forms crystal grains and segregates in the polysilicon film 102 to remarkably increase the resistance of the polysilicon film 102 if not reaching the gate insulator film 102.
The aforementioned problems of the conventional polymetal gate are summarized as follows:
(1) As described with reference to the first prior art, it is apprehended that Si diffuses from the polysilicon film 102 into the barrier film 103 and the diffusing Si reacts with W and N in the barrier film 103 to form SiN, WSi.sub.x or WSiN in the heat treatment after deposition of the gate electrode 106, to disadvantageously increase the resistance of the barrier metal film 103.
(2) As described with reference to the second prior art, titanium reacts with polysilicon in the step of performing the high-temperature heat treatment on the gate electrode 106 to form metal silicide TiSi.sub.x, which disadvantageously deteriorates the characteristics of the gate insulator film 101 and extremely increases the sheet resistance of the gate electrode 106 when the barrier metal film 103 is prepared from TiN and Ti.
Further, the following problem is common to the first prior art and the second prior art:
(3) In general, the native oxide film formed on the surface of the polysilicon film 102 is removed with a chemical solution of hydrogen fluoride or the like before depositing the barrier metal film 103 by sputtering or the like. However, the native oxide film cannot be completely removed but remains and hence the interfacial resistance between the barrier metal film 103 and the polysilicon film 102 cannot be reduced to an intended degree due to the remaining native oxide film.